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RocketLogger
1.1.4
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#include <errno.h>#include <fcntl.h>#include <stdint.h>#include <stdio.h>#include <stdlib.h>#include <sys/mman.h>#include <sys/stat.h>#include <unistd.h>#include "log.h"#include "types.h"
Include dependency graph for pwm.h:
This graph shows which files directly or indirectly include this file:Go to the source code of this file.
Macros | |
| #define | PWMSS0_BASE 0x48300000 |
| PWMSS0 register base address. More... | |
| #define | PWMSS1_BASE 0x48302000 |
| PWMSS1 register base address. More... | |
| #define | EPWM_OFFSET 0x0200 |
| EPWM module register offset. More... | |
| #define | PWM_SIZE 0x00000FFF |
| Size of PWM register memory. More... | |
| #define | TBCTL (EPWM_OFFSET + 0x0) / sizeof(uint16_t) |
| Counter control register offset. More... | |
| #define | TBPRD (EPWM_OFFSET + 0xA) / sizeof(uint16_t) |
| Period register offset. More... | |
| #define | CMPA (EPWM_OFFSET + 0x12) / sizeof(uint16_t) |
| Compare register A offset. More... | |
| #define | CMPB (EPWM_OFFSET + 0x14) / sizeof(uint16_t) |
| Compare register B offset. More... | |
| #define | AQCTLA (EPWM_OFFSET + 0x16) / sizeof(uint16_t) |
| Action qualifier register offset. More... | |
| #define | AQCTLB (EPWM_OFFSET + 0x18) / sizeof(uint16_t) |
| Action qualifier register B offset. More... | |
| #define | TBCTL_DEFAULT 0xC000 |
| Default counter value (see AM335x_TR) More... | |
| #define | UP_DOWN_COUNT 0x0002 |
| Up-down counting. More... | |
| #define | PRESCALE2 0x0400 |
| Counter prescale 2. More... | |
| #define | RWC_AQ_A 0x0060 |
| Action qualifier A value for latch reset (see AM335x_TR) More... | |
| #define | RWC_AQ_B 0x0900 |
| Action qualifier B value for latch reset (see AM335x_TR) More... | |
| #define | PULSE_WIDTH 0.1 |
| Latch reset pulse width (part of sampling period) More... | |
| #define | MARGIN 0.1 |
| Latch reset period margin. More... | |
| #define | PWM_PERIOD_SCALE |
| Latch reset period scaling factor. More... | |
| #define | ADC_CLOCK_PERIOD 48 |
| ADC master clock period in ns. More... | |
| #define | ADC_AQ 0x0025 |
| Action qualifier value for ADC clock (see AM335x_TR) More... | |
Functions | |
| int | pwm_setup (void) |
| void | pwm_close (void) |
| void | pwm_setup_range_clock (int sample_rate) |
| void | pwm_setup_adc_clock (void) |
| #define ADC_AQ 0x0025 |
Action qualifier value for ADC clock (see AM335x_TR)
Definition at line 102 of file pwm.h.
Referenced by pwm_setup_adc_clock().
| #define ADC_CLOCK_PERIOD 48 |
ADC master clock period in ns.
Definition at line 100 of file pwm.h.
Referenced by pwm_setup_adc_clock().
| #define AQCTLA (EPWM_OFFSET + 0x16) / sizeof(uint16_t) |
Action qualifier register offset.
Definition at line 69 of file pwm.h.
Referenced by pwm_setup_adc_clock(), and pwm_setup_range_clock().
| #define AQCTLB (EPWM_OFFSET + 0x18) / sizeof(uint16_t) |
Action qualifier register B offset.
Definition at line 71 of file pwm.h.
Referenced by pwm_setup_range_clock().
| #define CMPA (EPWM_OFFSET + 0x12) / sizeof(uint16_t) |
Compare register A offset.
Definition at line 65 of file pwm.h.
Referenced by pwm_setup_adc_clock(), and pwm_setup_range_clock().
| #define CMPB (EPWM_OFFSET + 0x14) / sizeof(uint16_t) |
Compare register B offset.
Definition at line 67 of file pwm.h.
Referenced by pwm_setup_range_clock().
| #define PRESCALE2 0x0400 |
| #define PULSE_WIDTH 0.1 |
Latch reset pulse width (part of sampling period)
Definition at line 89 of file pwm.h.
Referenced by pwm_setup_range_clock().
| #define PWM_PERIOD_SCALE |
Latch reset period scaling factor.
Definition at line 93 of file pwm.h.
Referenced by pwm_setup_range_clock().
| #define PWM_SIZE 0x00000FFF |
Size of PWM register memory.
Definition at line 57 of file pwm.h.
Referenced by pwm_close(), and pwm_setup().
| #define PWMSS0_BASE 0x48300000 |
PWMSS0 register base address.
Copyright (c) 2016-2018, Swiss Federal Institute of Technology (ETH Zurich) All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Definition at line 49 of file pwm.h.
Referenced by pwm_setup().
| #define PWMSS1_BASE 0x48302000 |
| #define RWC_AQ_A 0x0060 |
Action qualifier A value for latch reset (see AM335x_TR)
Definition at line 83 of file pwm.h.
Referenced by pwm_setup_range_clock().
| #define RWC_AQ_B 0x0900 |
Action qualifier B value for latch reset (see AM335x_TR)
Definition at line 85 of file pwm.h.
Referenced by pwm_setup_range_clock().
| #define TBCTL (EPWM_OFFSET + 0x0) / sizeof(uint16_t) |
Counter control register offset.
Definition at line 61 of file pwm.h.
Referenced by pwm_setup_adc_clock(), and pwm_setup_range_clock().
| #define TBCTL_DEFAULT 0xC000 |
Default counter value (see AM335x_TR)
Definition at line 75 of file pwm.h.
Referenced by pwm_setup_adc_clock(), and pwm_setup_range_clock().
| #define TBPRD (EPWM_OFFSET + 0xA) / sizeof(uint16_t) |
Period register offset.
Definition at line 63 of file pwm.h.
Referenced by pwm_setup_adc_clock(), and pwm_setup_range_clock().
| #define UP_DOWN_COUNT 0x0002 |
| void pwm_close | ( | void | ) |
Unmap PWM registers from user space
Definition at line 80 of file pwm.c.
References mem_fd, PWM_SIZE, pwmss0_regs, and pwmss1_regs.
Referenced by hw_close().
| int pwm_setup | ( | void | ) |
Map PWM registers into user space (on pwmss0_regs and pwmss1_regs pointer)
Definition at line 46 of file pwm.c.
References ERROR, FAILURE, mem_fd, PWM_SIZE, PWMSS0_BASE, pwmss0_regs, PWMSS1_BASE, pwmss1_regs, rl_log(), and SUCCESS.
Referenced by hw_init().
Here is the call graph for this function:| void pwm_setup_adc_clock | ( | void | ) |
Setup PWMSS0 for ADC master clock
Definition at line 115 of file pwm.c.
References ADC_AQ, ADC_CLOCK_PERIOD, AQCTLA, CMPA, pwmss0_regs, TBCTL, TBCTL_DEFAULT, and TBPRD.
Referenced by hw_init().
| void pwm_setup_range_clock | ( | int | sample_rate | ) |
Setup PWMSS1 for range latch reset clock
| sample_rate | ADC sampling rate in Sps |
Definition at line 94 of file pwm.c.
References AQCTLA, AQCTLB, CMPA, CMPB, PRESCALE2, PULSE_WIDTH, PWM_PERIOD_SCALE, pwmss1_regs, RWC_AQ_A, RWC_AQ_B, TBCTL, TBCTL_DEFAULT, TBPRD, and UP_DOWN_COUNT.
Referenced by hw_init().